Independent recipes for Intel® Arc™ Pro
Tested recipes and architecture notes for B70, B65, B60, B50, and B580. Built around llama.cpp SYCL and vLLM XPU on real Battlemage hardware.
Battlemage die with up to 32 Xe-cores in 8 slices, 256 XMX engines, 608 GB/s GDDR6. Hover a core for slice index. Click for a spec chip. Prefers-reduced-motion shows a static SVG die.
the silicon, frame by frame
the constraint
The Battlemage GPU architecture has its own measured profile. This site provides practical recipes for running local LLM inference on Intel Arc Pro and consumer Battlemage cards, grounded in measurement.
Processing the prompt usually depends more on XMX compute. Generating each new token usually depends more on memory bandwidth. The silicon animation shows both paths.
the cards
the engines
OpenVINO™ and OpenVINO Model Server are supported Intel inference tools under active evaluation. XeCores will add a recipe after repeatable Battlemage measurements. OpenVINO on GitHub.
the recipes & cookbooks
6 validated families · up to 131,072 ctx
Six validated model families on llama.cpp SYCL and vLLM XPU — Qwen3.8/3.6, Nemotron-3.5-Lightning, Ornith-1.5, and Muse-Glimmer — with pinned image digests and patches.
MiniMax H3 FL2VA · 6 weights (~40 GiB)
MiniMax H3 FL2VA text-to-video on ComfyUI with PyTorch XPU — dual-B70 role split (UNet+VAE on GPU0, CLIP on GPU1), single-card CPU fallback, and a full gallery.
Full memory ceilings & coordinates
Per-model architecture drawers, memory ceilings, quantization quality comparisons, and exact execution coordinates on Intel Arc Pro B70 silicon.
the rules
faq
XeCores names the architecture; Intel stays in the prose. This is an independent project with no Intel product, partner program, or official channel behind it.
No. Independent project. Not affiliated with, endorsed by, or sponsored by Intel Corporation. Word-mark references to Intel® Arc™ Pro and OpenVINO™ toolkit are nominative.
OpenVINO and OpenVINO Model Server are supported Intel inference tools under evaluation. llama.cpp SYCL and vLLM XPU currently have validated XeCores routes. SGLang XPU remains blocked.
Full BMG-31: 32 Xe-cores, 256 XMX, 32 GB GDDR6, 608 GB/s. Enough memory for 27B-class dense models locally, with the bus as the honest decode limit. The consumer B580 and workstation B65 offer parallel points on the same die.
Open Benchmarks and select a result. Every published rate lists its model, engine, workload, statistic, cache state, concurrency, power limit and evidence.